If an ibaPDA system is already installed,the available tracking signals should be examined in ibaAnalyzer. Here, you can also prepare virtual signals so that they can subsequently be transferred to the ibaPDA I/O configuration.
Checking the availability and plausibility of tracking signals
The following figure shows the tracking signals from our CGL-QDR simulation (speeds, tracking IDs, measured length values and digital active/inactive signals for measuring devices).
The following figure shows an example from a hot rolling mill, where the edger and two roughing stands are run in reversing mode. The top graph shows the raw signals from the material tracking system for the head and tail positions of the slabs. The lower three graphs show the length values for each pass calculated in ibaAnalyzer based on these raw values.
Checking the required time base and the required length resolution
The time base must be selected so that at least 2 samples are acquired for each required length segment (in this case 1 m) at maximum speed. The more values per length segment, the better.
In the following example, we can see that the signals are available with a sampling rate of 10 ms, but the actual resolution differs for the different length signals. However, a 1 m resolution is always possible overall.
The top two graphs show the length at the welder and annealing. There a full meter is traveled over the entire length of the graph (approx. 240 ms). An acquisition time base of 10 ms results in approx. 24 samples per meter. At the shear in the exit section (lower graph) 5 m is traveled in the same period due to the higher speed. The resolution is still sufficient at 4 to 5 samples per meter. The jumps in the length value are always exactly 1 m and no more.
Check for signal quality and accuracy
Examine the usability of the tracking signals in terms of sufficient accuracy for material tracking (resolution of length measurement signals, meter pulses, etc.). Are there any outliers or other anomalies?
In the following example, anomalies can be identified in the signal form for the length signals.
Check for deterministics in the length values or data loss
If a length signal comes from a PLC, the output cycle must be sufficiently fast that there are still at least two output cycles per length segment (in this case 1m) at maximum speed.
In the following example, we can see that the output cycles of 100 ms would be sufficient, but the length signal actually only has a resolution of 1000 ms and thus the 1 m QDR resolution can no longer be deterministically mapped.
